This invention relates to digital image processing for particular application to image capture in a portable digital video imaging device such as a camera.
There is a need to be able to capture images at a first sampling rate while providing an accurate representation of the sampled image to output elements at a second sampling rate. In particular, there is a need to reduce the data rate to output elements in order to decrease system power dissipation and data storage requirements in power and storage-sensitive applications, such as preview modes of images in digital cameras.
As the conventional analog signal processing systems are replaced by digital systems, many processes can be compromised to take advantage of inherent benefits of digital processing. For example, it is sometimes necessary to reduce the amount of data captured so that it can be processed efficiently and economically. Whereas sample rate reduction reduces the amount of data, the widespread use of digital processing in a signal processing system typically requires more power than comparable analog systems. Subsampling the input signal after the analog to digital conversion has the drawback of requiring high power dissipation in upstream analog to digital conversion subsystems that work at a higher clock rate. Subsampling at any stage reduces information content at the expense of signal fidelity, such as increased noise and coarser granularity in processed images.
What is needed is a technique for reducing the data rate in a digital image acquisition system while saving power and without a correspondingly large reduction in signal fidelity.